The present invention relates to a semiconductor device in which is buried an element-isolating structure and also to a method of manufacturing the semiconductor device.
FIG. 39 is a sectional view showing the memory cells of a nonvolatile semiconductor memory having a conventional buried element-isolating structure. Trenches 902 are made in the upper surface of a silicon substrate 901. Each trench 902 is filled with an insulator 903. The insulators 903 constitute an element-isolating structure.
Thin oxide films 904 called "tunnel insulating film" are formed on the silicon substrate 901. Floating-gate electrodes 905 are formed on the films 904 (hereinafter referred to as "tunnel oxide film"). A SiO.sub.2 /Si.sub.3 N.sub.4 /SiO.sub.2 (ONO) film 906 is provided, covering the insulators 903 and the floating-gate electrodes 905. A control-gate electrode 907 is formed on the ONO film 906. The insulators 903 are buried in the trenches 902, with their upper parts contacting the sides of the floating-gate electrodes 905.
The insulator 903 is made of a silicon oxide-based material such as TEOS (tetraethoxysilane) or BPSG (borophosphosilicate glass). The buried insulator 903 made of silicon oxide-based material directly contacts the silicon substrate, or contact a silicon oxide film formed by oxidizing the surface of the substrate. The buried insulators 903 also contact the sides of the tunnel oxide film 904 and the sides of the floating-gate electrodes 905 made of polysilicon.
The method of manufacturing the memory cells isolated by the conventional element-isolating structure described above will be explained, with reference to FIGS. 40A to 40E.
First, as shown in FIG. 40A, the surface of a p-type silicon substrate 901 is oxidized, forming an oxide film 911. Ion implantation is performed, thereby forming well regions and channel regions in the substrate 901. The oxide film 911 is removed, and gate insulating films of peripheral circuits and a tunnel oxide film 904 are formed. A polysilicon layer 905 is deposited on the tunnel oxide film 904. Further, a silicon nitride film 912 is deposited on the polysilicon layer 905. A resist (not shown) is coated on the silicon nitride film 912 and subsequently processed, forming a resist pattern. Using the resist pattern as mask, the silicon nitride film 912, polysilicon film 905 and tunnel oxide film 904 are etched, exposing parts of the silicon substrate 901. The parts of the substrate 901, thus exposed, are etched, thereby forming trenches 902 in the substrate 901, as is illustrated in FIG. 40B. Then, the resist pattern (not shown) is removed from the resultant structure.
As shown in FIG. 40C, the inner surfaces of each trench 902 are oxidized, forming an oxide film 913. Silicon oxide, for example TEOS, is deposited on the substrate 901, filling the trenches 902 and covering the silicon nitride film 912.
Next, as shown in FIG. 40D, CMP (chemical mechanical polishing) is performed on the silicon oxide film, until the silicon nitride film 912 is exposed. Insulators 903 made of silicon oxide are thereby formed, each filling one trench 902 and having a flat top.
As shown in FIG. 40E, the silicon nitride film 912 used as a mask is removed, whereby an element-isolating structure is formed. An ONO film is deposited on the upper surface of the semiconductor structure. A polysilicon layer is deposited on the ONO film. The polysilicon layer is then patterned, forming control electrodes. Thus, memory cells are manufactured.
Each insulator 903 made of silicon oxide and filling one trench 902 directly contacts the tunnel oxide films 904 and the gate electrodes 905. Alternatively, the insulator 903 contacts the oxide film 913 which has been formed by thermally oxidizing the silicon substrate 901 and polysilicon film 905 and which contacts the substrate 901, the tunnel oxide film 904 and the gate electrodes 905. Anyway, each insulator 903 made of a silicon oxide-based material extends from the bottom of one trench 902 from the top thereof. With the structure, the impurities in the buried insulators 903, such as hydrogen and metal, may easily diffuse into the tunnel oxide films 904 and the interface between each tunnel oxide film 904 and the gate electrode 905. The diffused impurities may impair the operating efficiency of the transistors and memory cells incorporated in the nonvolatile semiconductor memory.
The impurities may diffuse from the buried insulators 903 into the surface regions of the silicon substrate 901, and in this case, the impurities impair the junction-leak characteristic of the diffusion layers of the transistors and memory cells. If the junction-leak characteristic is impaired, the memory cells will be deteriorated in terms of operating efficiency.